5.5.5.4 MPEG Hardware and Implementations

Gonzales, C.A., Allman, L., McCarthy, T., Wendt, P., Akansu, A.N.,
DCT coding for motion video storage using adaptive arithmetic coding,
SP:IC(2), No. 2, August 1990, pp. 145-154.
Elsevier DOI 0001
Video coding for digital storage media; intraframe quantization enhancement; adaptive arithmetic coding; non-linear filtering BibRef

Gonzales, C.A.[Cesar A.], McCarthy, T.[Thomas],
Transform coding using coefficient prediction techniques,
US_Patent5,001,559, Mar 19, 1991
WWW Link. BibRef 9103

Delogne, P.[Paul], van Caillie, B.[Beatrice], Poncin, O.[Olivier],
Video coding algorithm up to 10 Mbit/s,
SP:IC(5), No. 1-2, February 1993, pp. 119-125.
Elsevier DOI 0001
DCT coding algorithm; U-VLC BibRef

Suguri, K., Minami, T., Matsuda, H., Kusaba, R., Kondo, T., Kasai, R., Watanabe, T., Sato, H., Shibata, N., Tashiro, Y., Izuoka, T., Shimizu, A., Kotera, H.,
A Real-Time Motion Estimation and Compensation LSI with Wide Search Range for MPEG2 Video Encoding,
SolidCir(31), No. 11, November 1996, pp. 1733-1741. 9611
BibRef

Fernandez, J.M., Moreno, F., Meneses, J.M.,
A High-Performance Architecture with a Macroblock-Level-Pipeline for MPEG-2 Coding,
RealTimeImg(2), No. 6, December 1996, pp. 331-340. 9702
BibRef

Bhaskaran, V., Konstantinides, K., Lee, R.B., Beck, J.P.,
Algorithmic and architectural enhancements for real-time MPEG-1 decoding on a general purpose RISC workstation,
CirSysVideo(5), No. 5, October 1995, pp. 380-386.
IEEE Top Reference. 0206
BibRef

Murphy, C.D., Anandakumar, K.,
Real-Time MPEG-1 Audio Coding and Decoding on a DSP Chip,
Consumer(43), No. 1, February 1997, pp. 40-47. 9704
BibRef

Sun, H.F., Kwok, W., Chien, M., Ju, C.H.J.,
MPEG Coding Performance Improvement by Jointly Optimizing Coding Mode Decisions and Rate Control,
CirSysVideo(7), No. 3, June 1997, pp. 449-458.
IEEE Top Reference. 9706
BibRef

Kleihorst, R.P., Vanderwerf, A., Bruls, W.H.A., Verhaegh, W.F.J., Waterlander, E.,
MPEG2 Video Encoding in Consumer Electronics,
VLSIVideo(17), No. 2-3, November 1997, pp. 241-253. 9712
BibRef

Takashima, M., Ogura, E., Hiranaka, D., Ishii, T., Ishikawa, T.,
A Single-Chip MPEG2 MP-AT-ML Video Encoder LSI Including Wide Search Range Motion Estimation (H+/-288, V+/-96) and Many Functions for Consumer Use,
Consumer(44), No. 3, August 1998, pp. 784-792. 9810
BibRef

Takashima, M.[Masatoshi], Ogura, E.[Eiji],
Motion vector detection apparatus and predictive coding system for compensating for movement with the apparatus,
US_Patent5,973,741, Oct 26, 1999
WWW Link. BibRef 9910
And: US_Patent6,147,718, Nov 14, 2000
WWW Link. BibRef
And:
Motion vector detection apparatus and predictive coding system for compensating for movement with apparatus,
US_Patent6,128,042, Oct 3, 2000
WWW Link. BibRef

Ogura, E.[Eiji],
Motion vector detecting device,
US_Patent6,061,397, May 9, 2000
WWW Link. BibRef 0005

Kim, J.G., Lee, H., Kim, J., Jeong, J.H.,
Design and Implementation of an MPEG-2 Transport Stream Multiplexer for HDTV Satellite Broadcasting,
Consumer(44), No. 3, August 1998, pp. 672-678. 9810
BibRef

Basso, A.[Andrea], Cash, G.L., Civanlar, M.R.,
Real-time MPEG-2 delivery based on RTP: implementation issues,
SP:IC(15), No. 1-2, September 1999, pp. 165-178.
Elsevier DOI BibRef 9909

Kim, T.Y.[Tae-Yong], Roh, B.H.[Byeong-Hee], Kim, J.K.[Jae-Kyoon],
An accurate bit-rate control for real-time MPEG video encoder,
SP:IC(15), No. 6, March 2000, pp. 479-492.
Elsevier DOI 0002
BibRef

Wang, L.M.[Li-Min],
Rate control for MPEG video coding,
SP:IC(15), No. 6, March 2000, pp. 493-511.
Elsevier DOI 0002

See also Bit rate control for hybrid DPCM/DCT video codec. BibRef

Wang, L.M.[Li-Min], Luthra, A., Eifrig, B.,
Rate control for MPEG transcoders,
CirSysVideo(11), No. 2, February 2001, pp. 222-234.
IEEE Top Reference. 0001
BibRef

Wang, L.M.[Li-Min], Luthra, A.[Ajay], Eifrig, R.O.[Robert O.],
Rate control for an MPEG transcoder without a priori knowledge of picture type,
US_Patent6,570,922, May 27, 2003
WWW Link. BibRef 0305

Wang, L.M.[Li-Min], Luthra, A.[Ajay], Eifrig, B.[Bob],
Adaptive Rate Control For MPEG Transcoder,
ICIP99(IV:266-270).
IEEE DOI BibRef 9900

Senda, Y.,
Approximate Criteria for the MPEG-2 Motion Estimation,
CirSysVideo(10), No. 3, April 2000, pp. 490-497.
IEEE Top Reference. 0004
BibRef

Senda, Y.[Yuzo],
Apparatus for compressive coding in moving picture coding device,
US_Patent5,719,630, Feb 17, 1998
WWW Link. BibRef 9802

Zucker, D.F., Lee, R.B., Flynn, M.J.,
Hardware and Software Cache Prefetching Techniques for MPEG Benchmarks,
CirSysVideo(10), No. 5, August 2000, pp. 782-796.
IEEE Top Reference. 0008
BibRef

Hong, S.H., Kim, S.D.,
Joint Video Coding of MPEG-2 Video Programs for Digital Broadcasting Services,
Broadcast(44), No. 2, June 1998, pp. 153-164. 9806
BibRef

O'Leary, S.,
Field Trials of an MPEG2 Distributed Single Frequency Network,
Broadcast(44), No. 2, June 1998, pp. 194-205. 9806
BibRef

Ling, N., Wang, N.T., Ho, D.J.,
An Efficient Controller Scheme for MPEG-2 Video Decoder,
Consumer(44), No. 2, May 1998, pp. 451-458. 9807
BibRef

Mombers, F., Gumm, M., Stephanie, D., Garino, P., Mlynek, D.,
Image: A Low-Cost, Low-Power Video Processor for High-Quality Motion Estimation in MPEG-2 Encoding,
Consumer(44), No. 3, August 1998, pp. 774-783. 9810
BibRef

de With, P.H.N., Frencken, P.H., van der Schaar, M.,
An MPEG Decoder with Embedded Compression for Memory Reduction,
Consumer(44), No. 3, August 1998, pp. 545-555. 9810
BibRef

Assuncao, P.A.A., Ghanbari, M.,
Frequency-Domain Video Transcoder for Dynamic Bit-Rate Reduction of MPEG-2 Bit Streams,
CirSysVideo(8), No. 8, December 1998, pp. 953.
IEEE Top Reference.
See also Buffer Analysis and Control in CBR Video Transcoding. BibRef 9812

Ghanbari, M., Assuncao, P.A.A.,
Control of MPEG-2 video traffic in an ATM environment,
ICIP96(II: 837-840).
IEEE DOI 9610
BibRef

Assuncao, P.A.A., Ghanbari, M.,
Transcoding of Single-Layer MPEG Video into Lower Rates,
VISP(144), No. 6, December 1997, pp. 377-383. 9806
BibRef

Cordeiro, P.J.[Paulo J.], Gomez-Pulido, J.[Juan], Assunção, P.A.A.[Pedro A.A.],
Efficient Constrained Video Coding for Low Complexity Decoding,
ICIAR08(xx-yy).
Springer DOI 0806
BibRef

Akramullah, S.M., Ahmad, I., Liou, M.L.,
Performance of Software-Based MPEG-2 Video Encoder on Parallel and Distributed Systems,
CirSysVideo(7), No. 4, August 1997, pp. 687-695.
IEEE Top Reference. 9708
BibRef

He, Y., Ahmad, I., Liou, M.L.,
A Software-Based MPEG-4 Video Encoder Using Parallel Processing,
CirSysVideo(8), No. 7, November 1998, pp. 909.
IEEE Top Reference. BibRef 9811

Lee, S.S.[Seong-Soo], Kim, J.M., Chae, S.I.[Soo-Ik],
New Motion Estimation Algorithm Using Adaptively Quantized Low Bit-Resolution Image and Its VLSI Architecture for MPEG2 Video Encoding,
CirSysVideo(8), No. 6, October 1998, pp. 734.
IEEE Top Reference. BibRef 9810

Lee, S.S.[Seong-Soo], Chae, S.I.[Soo-Ik],
Two-step motion estimation algorithm using low-resolution quantization,
ICIP96(III: 795-798).
IEEE DOI 9610
BibRef

Kim, T.S.[Tae Sung], Rhee, C.E.[Chae Eun], Lee, H.J.[Hyuk-Jae], Chae, S.I.[Soo-Ik],
Fast Integer Motion Estimation With Bottom-Up Motion Vector Prediction for an HEVC Encoder,
CirSysVideo(28), No. 12, December 2018, pp. 3398-3411.
IEEE DOI 1812
Encoding, High efficiency video coding, Prediction algorithms, Motion estimation, Computational complexity, Standards, bottom-up approach BibRef

McVeigh, J.S., Chen, G.K., Goldstein, J., Gupta, A., Keith, M., Wood, S.,
A Software-Based Real-Time MPEG-2 Video Encoder,
CirSysVideo(10), No. 7, October 2000, pp. 1178-1184.
IEEE Top Reference. 0010
BibRef

Matoba, N., Kondo, Y., Ohtsuka, H., Tanaka, T.,
Performance evaluation of 32 kbits/s real-time and dual-direction video communication system for wireless channels,
CirSysVideo(11), No. 5, May 2001, pp. 664-672.
IEEE Top Reference. 0105
BibRef

Chen, Y.W.[Ying-Wei], Zhong, Z.[Zhun], Lan, T.H.[Tse-Hua], Peng, S., van Zon, K.,
Regulated complexity scalable MPEG-2 video decoding for media processors,
CirSysVideo(12), No. 8, August 2002, pp. 678-687.
IEEE Top Reference. 0208
BibRef

Berekovic, M., Stolberg, H.J., Pirsch, P.,
Multicore system-on-chip architecture for MPEG-4 streaming video,
CirSysVideo(12), No. 8, August 2002, pp. 688-699.
IEEE Top Reference. 0208
BibRef

Garg, R., Chung, C.Y., Kim, D.[Donglok], Kim, Y.M.[Yong-Min],
Boundary macroblock padding in MPEG-4 video decoding using a graphics coprocessor,
CirSysVideo(12), No. 8, August 2002, pp. 719-723.
IEEE Top Reference. 0208
BibRef

Hsia, S.C.[Shih-Chang],
An Adaptive Video Coding Control Scheme for Real-Time MPEG Applications,
JASP(2003), No. 3, March 2003, pp. 244.
WWW Link. 0304
BibRef

Hsia, S.C.[Shih-Chang], Wang, S.H.[Szu-Hong],
Adaptive video coding control for real-time H.264/AVC encoder,
JVCIR(20), No. 7, October 2009, pp. 463-477.
Elsevier DOI 0909
H.264/AVC; Coding control; Initial QP; Rate control; Adaptive GOP; Scene change; Constant bitrate; Video coding BibRef

Hsia, S.C.[Shih-Chang], Wang, S.H.[Szu-Hong],
High-performance adaptive group-of-picture rate control for H.264/AVC,
SIViP(5), No. 2, June 2011, pp. 155-163.
WWW Link. 1101
BibRef

Hsia, S.C.[Shih-Chang], Hung, Y.C.[Yu-Chun],
Fast multi-frame motion estimation for H264/AVC system,
SIViP(4), No. 2, June 2010, pp. xx-yy.
Springer DOI 1006
BibRef

Hsia, S.C., Cheng, S.C., Chen, C.L.,
A Real-Time Chip Implementation for Adaptive Video Coding Control,
CirSysVideo(14), No. 8, August 2004, pp. 1098-1104.
IEEE Abstract. 0409
BibRef

Huang, Y.W.[Yu-Wen], Ma, S.Y.[Shyh-Yih], Shen, C.F.[Chun-Fu], Chen, L.G.[Liang-Gee],
Predictive line search: an efficient motion estimation algorithm for MPEG-4 encoding systems on multimedia processors,
CirSysVideo(13), No. 1, January 2003, pp. 111-117.
IEEE Top Reference. 0301
BibRef

Lee, T.Y.[Tae Young],
A new frame-recompression algorithm and its hardware design for MPEG-2 video decoders,
CirSysVideo(13), No. 6, June 2003, pp. 529-534.
IEEE Abstract. 0307
BibRef

Lappalainen, V., Hallapuro, A., Hamalainen, T.D.,
Complexity of optimized H.26L video decoder implementation,
CirSysVideo(13), No. 7, July 2003, pp. 717-725.
IEEE Abstract. 0308
BibRef

Peng, S.M.[Shao-Min],
Scalable MPEG-2 decoder,
US_Patent6,717,988, Apr 6, 2004
WWW Link. BibRef 0404

Chung, K.L.[Kuo-Liang], Chen, H.N.[Hsiu-Niang],
On decoding MPEG-4 reversible variable length codes,
SP:IC(20), No. 2, February 2005, pp. 187-192.
Elsevier DOI 0501
BibRef

Lee, K.B.[Kun-Bin], Lin, J.Y.[Jih-Yiing], Jen, C.W.[Chein-Wei],
A multisymbol context-based arithmetic coding architecture for MPEG-4 shape coding,
CirSysVideo(15), No. 2, February 2005, pp. 283-295.
IEEE Abstract. 0501
BibRef

Huang, Y.W.[Yu-Wen], Hsieh, B.Y.[Bing-Yu], Chen, T.C.[Tung-Chien], Chen, L.G.[Liang-Gee],
Analysis, Fast Algorithm, and VLSI Architecture Design for H.264/AVC Intra Frame Coder,
CirSysVideo(15), No. 3, March 2005, pp. 378-401.
IEEE Abstract. 0501
BibRef

Chen, Y.H.[Yi-Hau], Cheng, C.C., Chuang, T.D., Chen, C.Y.[Ching-Yeh], Chien, S.Y., Chen, L.G.[Liang-Gee],
Efficient Architecture Design of Motion-Compensated Temporal Filtering/Motion Compensated Prediction Engine,
CirSysVideo(18), No. 1, January 2008, pp. 98-109.
IEEE DOI 0802
BibRef

Chen, C.Y.[Ching-Yeh], Huang, C.T.[Chao-Tsung], Chen, Y.H.[Yi-Hau], Lian, C.J.[Chung-Jr], Chen, L.G.[Liang-Gee],
System Analysis of VLSI Architecture for Motion-Compensated Temporal Filtering,
ICIP05(III: 992-995).
IEEE DOI 0512
BibRef

Chen, T.C., Chien, S.Y., Huang, Y.W., Tsai, C.H., Chen, C.Y., Chen, T.W., Chen, L.G.,
Analysis and Architecture Design of an HDTV720p 30 Frames/s H.264/AVC Encoder,
CirSysVideo(16), No. 6, June 2006, pp. 673-688.
IEEE DOI 0606
BibRef

Chen, Y.H., Chen, T.C., Tsai, C.Y., Tsai, S.F., Chen, L.G.,
Algorithm and Architecture Design of Power-Oriented H.264/AVC Baseline Profile Encoder for Portable Devices,
CirSysVideo(19), No. 8, August 2009, pp. 1118-1128.
IEEE DOI 0909
BibRef

Lee, K.B., Lin, T.C., Jen, C.W.,
An Efficient Quality-Aware Memory Controller for Multimedia Platform SoC,
CirSysVideo(15), No. 5, May 2005, pp. 620-633.
IEEE Abstract. 0505
BibRef

Denolf, K., de Vleeschouwer, C., Turney, R., Lafruit, G., Bormans, J.,
Memory Centric Design of an MPEG-4 Video Encoder,
CirSysVideo(15), No. 5, May 2005, pp. 609-619.
IEEE Abstract. 0505
BibRef

Alam, M., Badawy, W., Jullien, G.,
A New Time Distributed DCT Architecture for MPEG-4 Hardware Reference Model,
CirSysVideo(15), No. 5, May 2005, pp. 726-730.
IEEE Abstract. 0505
BibRef

Chien, C.D., Lu, K.P., Chen, Y.M., Guo, J.I., Chu, Y.S., Su, C.L.,
An Area-Efficient Variable Length Decoder IP Core Design for MPEG-1/2/4 Video Coding Applications,
CirSysVideo(16), No. 9, September 2006, pp. 1172-1178.
IEEE DOI 0610
BibRef

Osorio, R.R., Bruguera, J.D.,
High-Throughput Architecture for H.264/AVC CABAC Compression System,
CirSysVideo(16), No. 11, November 2006, pp. 1376-1384.
IEEE DOI 0611
BibRef

Chen, T.C.[Tung-Chien], Chen, Y.H.[Yu-Han], Tsai, S.F.[Sung-Fang], Chien, S.Y.[Shao-Yi], Chen, L.G.[Liang-Gee],
Fast Algorithm and Architecture Design of Low-Power Integer Motion Estimation for H.264/AVC,
CirSysVideo(17), No. 5, May 2007, pp. 568-577.
IEEE DOI 0705
BibRef

Wang, Y.J.[Yu-Jen], Cheng, C.C.[Chao-Chung], Chang, T.S.[Tian-Sheuan],
A Fast Algorithm and Its VLSI Architecture for Fractional Motion Estimation for H.264/MPEG-4 AVC Video Coding,
CirSysVideo(17), No. 5, May 2007, pp. 578-583.
IEEE DOI 0705
BibRef

Yi, Y.S.[Yong-Seok], Park, I.C.[In-Cheol],
High-Speed H.264/AVC CABAC Decoding,
CirSysVideo(17), No. 4, April 2007, pp. 490-494.
IEEE DOI 0705
BibRef

Wu, Y., Woods, J.W.,
Scalable Motion Vector Coding Based on CABAC for MC-EZBC,
CirSysVideo(17), No. 6, June 2007, pp. 790-795.
IEEE DOI 0706
BibRef

Wu, Y., Woods, J.W.,
Aliasing Reduction via Frequency Roll-Off for Scalable Image/Video Coding,
CirSysVideo(18), No. 1, January 2008, pp. 48-58.
IEEE DOI 0802
BibRef

Hsu, H.C., Lee, K.B., Chang, N.Y.C., Chang, T.S.,
Architecture Design of Shape-Adaptive Discrete Cosine Transform and Its Inverse for MPEG-4 Video Coding,
CirSysVideo(18), No. 3, March 2008, pp. 375-386.
IEEE DOI 0804
BibRef

Lin, W.C., Chen, C.H.,
Frame Buffer Access Reduction for MPEG Video Decoder,
CirSysVideo(18), No. 10, October 2008, pp. 1452-1456.
IEEE DOI 0811
BibRef

Tanougast, C., Janiaut, M., Berviller, Y., Rabah, H., Weber, S., Bouridane, A.,
An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis,
CirSysVideo(19), No. 2, February 2009, pp. 237-249.
IEEE DOI 0902
BibRef

Gu, R.R.[Rui-Rui], Janneck, J.W., Bhattacharyya, S.S., Raulet, M., Wipliez, M., Plishker, W.,
Exploring the Concurrency of an MPEG RVC Decoder Based on Dataflow Program Analysis,
CirSysVideo(19), No. 11, November 2009, pp. 1646-1657.
IEEE DOI 0912
BibRef

Gorin, J.[Jérôme], Raulet, M.[Mickaël], Prêteux, F.[Françoise],
MPEG Reconfigurable Video Coding: From specification to a reconfigurable implementation,
SP:IC(28), No. 10, 2013, pp. 1224-1238.
Elsevier DOI 1312
MPEG Reconfigurable Video Coding BibRef

Ahmad, J.J.[Junaid Jameel], Li, S.J.[Shu-Jun], Thavot, R.[Richard], Mattavelli, M.[Marco],
Secure computing with the MPEG RVC framework,
SP:IC(28), No. 10, 2013, pp. 1315-1334.
Elsevier DOI 1312
Reconfigurable Video Coding (RVC) BibRef

Ahmad, J.J.[Junaid Jameel], Li, S.J.[Shu-Jun], Mattavelli, M.[Marco],
Performance benchmarking of RVC based multimedia specifications,
ICIP13(4569-4573)
IEEE DOI 1402
BibRef

Casale-Brunet, S.[Simone], Elguindy, A.[Abdallah], Bezati, E.[Endri], Thavot, R.[Richard], Roquier, G.[Ghislain], Mattavelli, M.[Marco], Janneck, J.W.[Jorn W.],
Methods to explore design space for MPEG RMC codec specifications,
SP:IC(28), No. 10, 2013, pp. 1278-1294.
Elsevier DOI 1312
Reconfigurable Media Coding BibRef

Kim, H.Y.[Hyung-Yu], Kim, S.W.[So-Won], Lee, S.W.[Seung-Wook], Jang, E.S.[Euee S.],
Parser description-based bitstream parser generation for MPEG RMC framework,
SP:IC(28), No. 10, 2013, pp. 1255-1277.
Elsevier DOI 1312
Reconfigurable media coding BibRef

Tulvan, C.[Christian], Preda, M.[Marius],
3D graphics coding in a reconfigurable environment,
SP:IC(28), No. 10, 2013, pp. 1239-1254.
Elsevier DOI 1312
MPEG reconfigurable media coding BibRef

Hoffman, M.P.[Marc P.], Balster, E.J.[Eric J.], Turri, W.F.[William F.],
High-throughput CAVLC architecture for real-time H.264 coding using reconfigurable devices,
RealTimeIP(11), No. 1, January 2016, pp. 75-82.
WWW Link. 1601
BibRef

Bahri, N.[Nejmeddine], Belhadj, N.[Nidhameddine], Grandpierre, T.[Thierry], Ben Ayed, M.A.[Mohamed Ali], Masmoudi, N.[Nouri], Akil, M.[Mohamed],
Real-time H264/AVC encoder based on enhanced frame level parallelism for smart multicore DSP camera,
RealTimeIP(12), No. 4, December 2016, pp. 791-812.
Springer DOI 1612
BibRef
Earlier: A1, A2, A4, A5, A3, A6:
Real-time H264/AVC high definition video encoder on a multicore DSP TMS320C6678,
ICCVIA15(1-6)
IEEE DOI 1603
digital signal processing chips BibRef

Duan, L.Y., Sun, W., Zhang, X., Wang, S., Chen, J., Yin, J., See, S., Huang, T., Kot, A.C., Gao, W.,
Fast MPEG-CDVS Encoder With GPU-CPU Hybrid Computing,
IP(27), No. 5, May 2018, pp. 2201-2216.
IEEE DOI 1804
BibRef
Earlier: A2, A3, A4, A5, A1, Only:
GPU Based fast MPEG-CDVS encoder,
ICIP17(1122-1126)
IEEE DOI 1803
graphics processing units, image retrieval, video coding, CDVS core techniques, CDVS encoder, GPU-CPU hybrid computing, visual search. Feature extraction. BibRef

Tan, S.[Sisi], Qiao, F.[Fei], Xia, B.B.[Bing-Bing], Yang, H.Z.[Hua-Zhong], Wang, H.[Hui],
A Functional Model of SystemC-Based MPEG-2 Decoder with Heterogeneous Multi-IP-Cores and Hybrid-Interconnections Architecture,
CISP09(1-5).
IEEE DOI 0910
BibRef

Cai, K.[Ken], Liang, X.Y.[Xiao-Ying], Wang, K.Q.[Ke-Qiang],
A Reconfigurable Platform for MPEG-4 Encoder Based on SOPC,
CISP09(1-5).
IEEE DOI 0910
BibRef

Niedermeier, F.[Florian], Niedermeier, M.[Michael], Kosch, H.[Harald],
Quality Assessment of the MPEG-4 Scalable Video CODEC,
CIAP09(297-306).
Springer DOI 0909
BibRef

Bilen, C., Aksay, A., Akar, G.B.,
A Multi-View Video Codec Based on H.264,
ICIP06(541-544).
IEEE DOI 0610
BibRef

Schumacher, P., Denolf, K., Chirila-Rus, A., Turney, R., Fedele, N., Vissers, K., Bormans, J.,
A Scalable, Multi-Stream MPEG-4 Video Decoder for Conferencing and Surveillance Applications,
ICIP05(II: 886-889).
IEEE DOI 0512
BibRef

Cho, C.Y.[Chuan-Yu], Huang, S.Y.[Shiang-Yang], Hwang, J.N.[Jenq-Neng], Wang, J.S.[Jia-Shung],
An Embedded Merging Scheme for VLSI Implementation of H.264/AVC Motion Estimation Modules,
ICIP05(III: 1016-1019).
IEEE DOI 0512
BibRef

Kordasiewicz, R.C., Shirani, S.,
ASIC and FPGA Implementations of H.264 DCT and Quantization Blocks,
ICIP05(III: 1020-1023).
IEEE DOI 0512

See also Modeling Quantization of Affine Motion Vector Coefficients. BibRef

Chandrasekaran, S., Amira, A.,
An Area Efficient Low Power Inner Product Computation For Discrete Orthogonal Transforms,
ICIP05(III: 1024-1027).
IEEE DOI 0512
BibRef

Chang, J.K.[Jing-Kng], Fang, H.C.[Hung-Chi], Huang, Y.W.[Yen-Wei], Chen, L.G.[Liang-Gee],
Architecture of MPEG-7 color structure description generator for realtime video applications,
ICIP04(IV: 2813-2816).
IEEE DOI 0505
BibRef

Mackowiak, S.[Slawomir],
Multi-loop Scalable MPEG-2 Video Coders,
CAIP03(262-269).
Springer DOI 0311
BibRef

Yang, J.[Jinwha], Delp, E.J.,
Nested interleaving transcoder for MPEG-4 simple profile bitstream,
ICIP02(I: 721-724).
IEEE DOI 0210
BibRef

Pau, G., Pesquet-Popescu, B.[Béatrice],
Uniform motion-compensated 5/3 filterhank for subband video coding,
ICIP04(V: 3117-3120).
IEEE DOI 0505
BibRef

Bottreau, V., Bénetiére, M., Felts, B., Pesquet-Popescu, B.,
A Fully Scalable 3d Subband Video Codec,
ICIP01(II: 1017-1020).
IEEE DOI 0108
BibRef

Burchard, L.,
Estimating Decoding Times of MPEG-2 Video Streams,
ICIP00(Vol III: 560-563).
IEEE DOI 0008
BibRef

Chen, C.T., Chen, T.C., Feng, C., Huang, C.C., Jeng, F.C., Konstantinides, K., Smolenski, M., Wu, C.,
A Single-Chip MPEG-2 Video Encoder/Decoder for Consumer Applications,
ICIP99(IV:252-255).
IEEE DOI BibRef 9900

Cantineau, O., Legat, J.D.,
Efficient parallelisation of an MPEG-2 codec on a TMS320C80 video processor,
ICIP98(III: 977-980).
IEEE DOI 9810
BibRef

Bouville, C.[Christian], Houlier, P., Dubois, J.L., Marchal, I., Thebault, B., Klefstad, M.,
DVFLEX: A Flexible MPEG Real Time Video Codec,
ICIP96(II: 829-832).
IEEE DOI BibRef 9600

Galinec, D., Dekeyser, J.L., Marque, P.,
Mixed synchronous-asynchronous approach for real-time image processing: a MPEG-like coder,
ICIP96(II: 121-124).
IEEE DOI 9610
BibRef

Morimatsu, E., Sakai, K., Yamashita, K., Ohta, M., Miyasaka, H., Maeda, K., Ogura, H., Takeshita, N.,
Development of a VLSI chip for real time MPEG-2 video decoder,
ICIP95(III: 456-459).
IEEE DOI 9510
BibRef

Chapter on Image Processing, Restoration, Enhancement, Filters, Image and Video Coding continues in
MPEG Rate-Distortion Trade-Offs, Transmissions Issues .